To communicate with peripherals and other electronic devices, a computer needs to be able to input and output data beyond the computer itself. These pages explore the basics of computer I/O.
The diagram above shows a bit of a parallel bi-directional I/O port. This type of port provides both input and output using the same port I/O pin (right). It may be used to provide a "bus" to connect peripherals. A control latch controls the direction of the transfer (by setting a bit of the W (Write) register into the lower D type latch in the diagram.
Below is a summary of the operations required to read data from a port pin:
Reading can be performed by using a move instruction to clock a '1' into the I/O control latch, which will (via the Q output routed through the OR gate) switch OFF the upper FET (a p-channel type switches OFF when its input is high); simultaneously the '0' fed to the AND gate will switch OFF the lower FET. The output from the data latch is irrelevant as both FETs are OFF and the port is disabled . Data may now be read from the port pin.
Write operations are a little more complex; we have to consider the cases of writing a '0' and '1' separately. In either case we would use a move instruction to clock a '0' into the I/O control latch first, to configure the pin as an output (see below).
Suppose we want to write a '0' to the I/O pin. A move instruction is used to write the '0' to the port pin's data latch, but the inverted Q output is used, so a logic '1' is fed to the OR gate, switching OFF the upper FET; the same logic '1' is also fed to the AND gate whose other input is also '1', so the lower FET is switched ON and the pin's output is at logic '0'.
Suppose now we want to write a '1' to the I/O pin. A move instruction is used to write the '1' to the port pin's data latch, but the inverted Q output is still used, so a logic '0' is fed to the OR gate, and as the other input is also logic '0', this switches ON the upper FET; the same logic '0' from the data latch is also fed to the AND gate (the other input being '1') so the lower FET is switched OFF and the output is at logic '1'.
When data is transmitted serially over distances greater than a few metres the 5v TTL logic system is found to be inadequate, and typically buffers or isolators are used to improve data transmission reliability and noise immunity. One common system used for data communications is 'RS232' . This uses a voltage system usually using larger voltage swings than TTL (e.g. +12V and -12V) (and uses RS232 'buffers' which you can think of as voltage amplifiers).
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Author: Gorry Fairhurst (Email: G.Fairhurst@eng.abdn.ac.uk)